Zen Mod

KC objavio novu PL

ih, ja uvek nadjem

i to mu je samo na cetvrt koraka od VdGG pazljivo, Doc, zelis li da dozivis ponedeonik

i rakija mu Zenovača

ovi neki sa tanojima samo na to misle

od Altec-a, 604 varijeteti - i pored svega, samo dva varijeteta zasluzuju da se zovu kompletnim najnoviji od GPA i cini mi se H suffix, od starih svi ostali su drop dead od 10K navise, i ne pije vode bez dodatnog visokog msm, onda - cemu frka ....... nije full range combo

000

dzaba vam i tenoji, kad sam pokupio sve RCA LC1 u Srbiji (i sire) a da valjaju msm, i corava koka zrno ubode, sto ne bi i ja te stare ruzne nikakve e, nije da je moj duzi ...... nego sam ja coraviji!

0 ima isto tenoja ko Woland ima isto tenoya ko Nnj e, zna se ko ovde ima najvise tenoja i tenoj godina u pricuvi

sto bi jedan reko - tvoji tenoji su stariji od Wolandovih!

sto bi jedan reko - sad imas tenoja ko Woland!

Doc, ne znam sta je paja hteo da kaze, zato sam i izbacio "paja" iz quoted mozda po odnosu na bliske musterije jesu slicni (Kuzma je po tome vec legenda) , ali bihrekao da tu svaka slicnost zavrsava da se podsetimo - ja sam prvi ovojud govorio da je Lukas car jer se usudio da se pomeri pogledom od opsteprihvacenog, da je car da izbunari sto niko nije ...... ali Kuzma je primer po svemu ......bio i ostao

ne zalazim kakav je zvuk Lampizator DAC-ova, ali njih dvojica nemaju mesto u istoj recenici, uzevsi u obzir tehniku, tehnologiju i biznis model

ma jok, sva su ista ja samo menjam naslove

Level shifter resistor fine tune schm, post #1 , resistor name is R115 and there is note beside in later sketches - level shifting resistor, explained goal is to have so so symetricall gate voltages of IRFP down and IRF up ....... (so DC offset behavior in Temp/time/mains voltage variations domains is predictable and minimally changing) let's say that they are 4V nominally logic is that source of IRF is approx at level of amp output let's say that you know which Ugs is of SIT you're using ( even if you don't , easy to make adjustment later) ....... and let's say it is nice round figure of -3V value of R115 needs to be adjusted in a way that we have voltage sag across exactly in value of SIT Ugs and that's easy to compute - programmed current of Q103+T101 CCS is in range of 30mA, so for 3V voltage sag calculus is easy R=3V/30mA= 100R in my case I did use 120R for both channels in case that you're using unknown Ugs SIT - all you need after ballpark setting of Iq and DC Offset is to measure Ugs of M101 and M102, and fix** R115 to get them approx. same in absolute number easypeasy **it's cunning to solder there 1pin holders first then push preliminary/temporary resistor in; when final resistor is determined, just solder it in 1pin holders, for better sleep would pack these 1pinners in kits, ZM Genius

How it sounds.... will it drive F4? Oh, yes - it sounds ... Spooky! will it drive F4 - dunno, didn't tried does it sound different to previous SissySIT iterations (both no-R and R.2) > no - there is no difference , simply because there is no other difference than made in biasing department I was personally curious to establish is it going to be any difference, considering that SIT is now driven by source follower ....... and - nope, nada, zilch ........ SIT gate is enough benign and polite thingie to be driven, while small IRF source follower is enough benign and polite ..... I mean - benign and polite in context of generally so crude THD generator, which SissySIT certainly is in my book, that's good enough Mimic of Papa's DEFiSIT ZM Happy Camper, Omnilucky, avoided Public Disgrace once more

.matching of SITs - hard facts as shown on two last pics in previous post - see specific part No. and Ugs of each - one is -3V66, second is -3V77 ( already established method - 24V@1A8) so , they are so-so close by Ugs, and not matched in any way by curves ( don't have that thingie and certainly not going to have one) find enclosed all measurements for both channels in one zip file if you are curious enough to open it, you'll see that THD of both channels is very close ...... maybe it's just sheer luck I'm having ( that parts are close by curves) or DEF OS is really so magic and enigmatic concept..... in any case, I'm bedazzled with DEF concept - I mean in general - use of two dissimilar parts in arrangement usually reserved for max. possible complementary ones SissySIT R.3 measurements.zip

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Load 4R

Iq 1A7 no significant difference between stone cold and Temp. equilibrium state load 8R

now, as all important is explained, time to mull about rail sense I know for sure that Pa is using something in that manner already in PL products, but him being Pa - solving everything with resistors and zeners as level shifters Mighty ZM , being chicken , I didn't up to recently even know that resistor can be described as CCS ( even if poor one), and I decided to use helper CCS ( see explanation) in form of ultramumbojumbo5$specialpart in M2 case - wee see that optodiode is fed with voltage from source resistors, where we have voltage in abundance, even shaving it with series resistor in SissySIT ( still damn good piece of work, if you ask Mighty Modesty Moi), I did use Hall chips ( tnx, Mighty Indra) ....... slope of voltage given at chip output is (2V5 to 5V)/(0 to 5A) ........ but effectively lower due to all summing and whatnot; didn't tried zeners as level shifters to decrease summing losses, but damn slope must be same , shifted with resistors or with anything else working, but I maybe didn't knew that I can do better, but I obviously wished that I can do better, regarding Iq and offset stability in rail voltage/temp/time domains so, if one choose to use ( minimal needed value of) rail resistors as current sense chain, even with 0R11 ( two of 0R22 in parallel) we have better effective voltage slope with current change ; numbers doesn't compute exactly, but from actual circuit, behavior is better than with Hall Chips now ....... say that current is 1A5 , as in LuDEF we have 165mV across 0R11 sense resistor......... ( I didn't want bigger value, sue me ...... later I got that voltage slope is enough with that value ) ..... but optoled needs nominally 1V1 to shine happily ............. so- there is a trick with helper CCS ( again, Pa using resistor there) , which is going to add some voltage to optoled - simple addition of 220R resistor and CCS pulling some current , we got additional 935mV from there, when you gotta that optoled is shining happy, everything is just matter of more or less voltage through series 0R11 all that nicely transposed to opto in lower rail, so we now have rail resistors, each of them having own optotransistor to pull current trough, optotransistors are summed together again, cap between two rail resistors, if using any of preceeding solutions with two mosfet gates ( one up, one down) we have symmetrical values of rail resistors, everything behaving nicely and polite and .......... almost boring (M2 is same boring, regarding that) so, what was left - put all these puzzle pieces on table and combine them much greater problem is to choose which one of wast number of permutations is worthy of becoming an amp, than drawing any of them if I forgot something , blame Pa